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A high Speed 8 Transistor Full Adder Design using Novel 3 Transistor XOR Gates
XOR gate full adder improvement in speed area minimization
2010/2/2
The paper proposes the novel design of a 3T XOR
gate combining complementary CMOS with pass transistor logic.
The design has been compared with earlier proposed 4T and 6T XOR
gates and a significan...