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SNEIK on Microcontrollers: AVR, ARMv7-M, and RISC-V with Custom Instructions
SNEIK SNEIKEN SNEIKHA
2019/8/19
SNEIK is a family of lightweight cryptographic algorithms derived from a single 512-bit permutation. The SNEIKEN authenticated encryption and SNEIKHA hash algorithms are candidates in the ongoing NIST...
RISC-V is a promising free and open-source instruction set architecture. Most of the instruction set has been standardized and several hardware implementations are commercially available. In this pape...
XMSS and Embedded Systems - XMSS Hardware Accelerators for RISC-V
XMSS hash-based signatures post-quantum cryptography
2019/1/2
We describe a hardware-software co-design for the hash-based post-quantum signature scheme XMSS on a RISC-V embedded processor. We provide software optimizations for the XMSS reference implementation ...
Superscalar Encrypted RISC: A Secret Computer in Simulation
Encrypted Computation Computer Architecture
2017/1/3
The architecture is 32-bit OpenRISC, admitting any block cipher compatible with the physical word size chosen for implementation. We are reporting performance from cycle-accurate behavioural simulatio...